1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, to a semiconductor device including a self-aligned conductive structure.
2. Description of the Prior Art
The development of semiconductor integrated circuit technology progresses continuously and circuit designs in products of the new generation become smaller and more complicated than those of the former generation. The amount and the density of the functional devices in each chip region are increased constantly according to the requirements of innovated products, and the size of each device has to become smaller accordingly. For example, in field effect transistors, the spacing between gate lines becomes smaller for enhancing the integrity of the integrated circuit. However, it is difficult to form conductive plugs in the extremely small space between the gate lines because of the exposure limitation of the photolithography process, and mis-alignments occurred in the photolithography process for forming the conductive plugs between the gate lines may result in yield loss because the process window is too limited.